EECS151LB
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EECS 151LB - Field-Programmable Gate Array Laboratory
Subject
EECS
Course Number
151LB
Department
Course Level
Undergraduate
Course Title
Field-Programmable Gate Array Laboratory
Course Description
This lab covers the design of modern digital systems with Field-Programmable Gate Array (FPGA) platforms. A series of lab exercises provide the background and practice of digital design using a modern FPGA design tool flow. Digital synthesis, partitioning, placement, routing, and simulation tools for FPGAs are covered in detail. The labs exercises culminate with a large design project, e.g., an implementation of a full three-stage RISC-V processor system, with caches, graphics acceleration, and external peripheral components. The design is mapped and demonstrated on an FPGA hardware platform.
Minimum Units
2
Maximum Units
2
Grading Basis
Default Letter Grade; P/NP Option
Instructors
Stojanovic, Wawrzynek
American Cultures Requirement
No
Reading and Composition Requirement
None of the Reading and Composition Requirement
Prerequisites
EECS 16A, EECS 16B, and COMPSCI 61C; EL ENG 105 recommended.
Repeat Rules
Course is not repeatable for credit.
Credit Restriction Courses
-
Formats
Laboratory
Term
Spring
Weeks
15 weeks
Weeks
15
Laboratory Hours
3
Outside Work Hours
3